1. Field of the Invention
The present invention relates to a method for putting into operation an integrated circuit that comprises a logic processor, a program memory of the logic processor and a fuzzy logic coprocessor.
2. Discussion of the Related Art
The making of an integrated circuit such as this is subject to constraints related to the structure of the program memories of the processor and of the fuzzy logic coprocessor. At the present time, a system comprising such a processor and such a coprocessor is not made in the form of a single integrated circuit. What has to be done, to obtain an equivalent circuit, is to arrange and organize the working of several different circuits with respect to one another. It may be imagined that, to obtain a single integrated circuit, it might be enough to integrate these two circuits (i.e. make them together) on one and the same monolithic integrated circuit. In practice, this is not possible in view of the fact that the memory structures are different for a fuzzy logic coprocessor for which the drawings and manufacturing masks are already available and for a logic processor for which the drawings and manufacturing masks are also already available. The combining, at low cost of two circuits of this type becomes impossible: the integrated circuit manufactured would be too big, and not easy to make. Indeed, the technological constraints of manufacture will affect output and the ability of the final circuit to be tested.
One approach would consist in entirely merging the characteristics of a known type of processor with the characteristics of a known type of fuzzy logic processor. However this approach, which amounts to redefining an entire new processor, is far too lengthy and costly to be implemented. In a patent application filed on even date entitled Device For Putting An Integrated Circuit Into Operation, which is incorporated herein by reference, it is planned, in order to resolve this problem, that the fuzzy logic processor will be provided with a volatile random-access memory. A phase for starting the integrated circuit, when the power is turned on, involves activating the loading of the volatile memory with the contents of a part of the program memory of the logic processor. This procedure resolves the above-mentioned problems of architecture and design.
However, such a system can be used only if there is a priori knowledge of the instructions to be stored in the program memory of the fuzzy logic processor. Such a situation arises for example if it is required to carry out the large-scale production of an appliance (for example a suction hood) provided with an integrated circuit designed to make this appliance work. However, there are cases where the a priori knowledge of instructions to be loaded into the program memory of the fuzzy logic processor either is not confirmed or subsequently has to be brought into question.
This knowledge is not confirmed in the finalizing stages when tests are made to ascertain that an installation will work as required. A finalizing process of this kind requires setting up of the installation (as in the case, for example, of a heating installation in a building), positioning of the integrated circuits to manage these instruments, and testing of the operation of the installation in every situation.
FIG. 1 shows, for example, a schematic view of such an installation. A set of sensors 1 to 3 measuring, for example, the temperature Txc2x0 and the pressure P delivers measurement signals. These measurement signals are conveyed to a multiplexer 4 of an electronic integrated circuit 5. The multiplexer 4 is linked to an analog-digital converter 6 that is itself linked to a processor 7. The processor 7 receives the information elements and processes them according to a program contained in a program memory 8 to which it is linked by an address bus 9 and a data bus 10. These data elements are then used either as commands to be applied to a peripheral actuator 11 or as such to be displayed on a display device 12 of the installation. The actuator peripheral 11 is, for example, a control unit for a valve. The processor 7 manages all these elements, in particular a decoder 13 of the memory 8 and an input/output device 14 of the integrated circuit 5, by means of a control decoder 15 which produces commands C applied to these external peripheral units as well as to the internal circuits 4, 6, 13, 14.
When the processing of the data elements coming from the sensors entails heavy work in view of the complexity of the phenomenon to be managed by the installation, an integrated circuit 16 including a fuzzy logic processor 17 is used in a known way. The fuzzy logic processor 17 is linked with its program memory 18 which contains rules by virtue of which the data elements have to be processed. The working of such a circuit 16 is known per se. The circuit 16 receives, in a natural way, the data elements through the data bus 10 and a performance command C delivered by the decoder 15. To carry out the processing, the processor 17 has a mode of operation of its own linked to the program recorded in a non-volatile way in its memory 18.
The set of integrated circuits 5 and 16 is installed on the devices of the installation and connected to a central processing unit by means of the input/output circuit 14 that enables the exchange of information elements with the other units of the installation by means of a transmission channel, herein represented by only two wires and working according to an RS232 series type protocol (of the ASCII type for example). A link by carrier current or other means using this same type of protocol can also be envisaged.
When such a system is being finalized, for example when one of the sensors 1 to 3 is changed, if its dynamic range is different from the originally planned dynamic range, then the contents of the memory 18 need to be changed. This implies complicated to-and-fro operations between each device in which the system of FIG. 1 is installed and the central site where there are means available to modify its contents. Such an approach is not practical to implement and it is an aim of the invention to resolve this problem.
In the invention, to resolve this and other problems, there is provision for replacing the memory 18 by a preferably volatile but essentially erasable and electrically programmable memory (EEPROM), and above all for prompting the loading of its program by means of an input/output circuit 14. In the invention, this loading then is done under the control of the main processor 7 which will manage the input/output circuit 14 and, with its address and data bus, activate the loading of the volatile memory that will replace the memory 18. Thus, in a manner complementary to the spirit of the patent application filed on the same date and mentioned here above, it is possible to activate the remote loading, in the memory, of a part of the program stored in the memory 8 or else, according to the present invention, the storage in this memory of information elements available, as and when they arrive, in the input/output circuit 14.